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M

Silicon System Validation Engineer

Meta
๐Ÿ‡บ๐Ÿ‡ธ United States
On-site
3 days ago
  • SoCs
  • Agile
  • Test Automation
  • Python
  • C++
  • SystemVerilog
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Join a passionate team driving the validation of Meta's next-generation devices, collaborating with cross-functional groups to ensure our custom custom silicon delivers target performance and quality for future AR products.

Responsibilities

  • Develop, execute, and sign-off on validation plans and targets for System on Chip (SoCs) and end-to-end HW/SW systems
  • Demonstrate a comprehensive understanding of system hardware, software, and firmware components; lead validation and debugging efforts
  • Collaborate with team members on lab debugging, silicon bug reproduction, failure analysis, and reporting
  • Conduct power and performance analysis of complex SoCs and subsystems, identifying areas of optimization
  • Proactively identify and communicate technical risks to project stakeholders, proposing solutions
  • Partner with cross-functional teams, including architecture, IP, firmware, SoC, and system engineering, to ensure the SoC achieves product goals
  • Operate effectively in an agile environment, adapting validation plans and targets to evolving roadmaps and project requirements

Minimum qualifications

  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
  • 8+ years of experience in silicon design verification or validation
  • Experience writing and debugging validation scripts and test automation (e.g., Python, C/C++, SystemVerilog) Experience with tape-out, bring-up and characterization of ASICs
  • Experience with graphics and display technologies
  • Experience with digital design, design verification and firmware/driver development
  • Track record of independently driving validation efforts to completion, identifying novel approaches to reproduce and resolve complex silicon issues
  • Masters in Electrical Engineering, Computer Science or equivalent domain

Silicon System Validation Engineer ยท Meta

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