Sr. DFT Engineer

Design for Test (DFT) Engineer (Experienced)

We are looking for an experiencedDFT Engineer with strong expertise in scan, ATPG, and test methodologies for complex digital designs. The candidate will be responsible for implementing and validating DFT architectures to ensure high test coverage and quality silicon.

Key Responsibilities

• Define and implementDFT architecture including scan, MBIST, and boundary scan.
• Performscan insertion, chain stitching, and compression techniques.
• Generate and analyzeATPG patterns to achieve high fault coverage.
• Debug and resolveDFT-related issues across design and silicon stages.
• Work closely withRTL, Physical Design, and STA teams for smooth integration.
• Supportpattern validation, gate-level simulations, and silicon bring-up.
• Ensure compliance withDFT and testability requirements.

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