Technical Lead I - VLSI

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Job Title
SoC Verification Engineer – NoC (Network-on-Chip)

Role Summary:
The SoC Verification Engineer is responsible for verifying and validating complex SoC designs with a focus on Network-on-Chip (NoC) architectures. The role involves developing verification environments, executing test plans, debugging design issues, and ensuring high-quality silicon delivery.

Key Responsibilities:

SoC & NoC Verification

• Develop and execute verification plans for SoC and NoC-based designs
• Verify NoC functionality, routing, QoS, bandwidth allocation, and traffic management
• Create and run directed and constrained-random test cases
• Ensure functional and coverage closure for assigned verification tasks

Testbench Development

• Develop UVM-based verification environments using SystemVerilog
• Create reusable verification components such as agents, monitors, scoreboards, and checkers
• Implement assertions and functional coverage models
• Maintain and enhance existing verification infrastructure

Protocol Verification

• Verify AMBA protocols including AXI, AHB, and APB
• Validate cache coherency, memory transactions, and data integrity
• Analyze interconnect behavior under different traffic scenarios
• Ensure protocol compliance and interoperability across IPs

Required Qualifications • Bachelor's or Master's degree in Electronics, Electrical Engineering, Computer Engineering, or related field
• 4+ years of experience in SoC/IP Verification
• Strong expertise in SystemVerilog and UVM
• Hands-on experience with NoC (Network-on-Chip) verification
• Good understanding of AXI, AHB, APB, cache coherency, and SoC architectures
• Experience with VCS, Xcelium, QuestaSim, Verdi, or similar EDA tools
• Knowledge of assertions (SVA), functional coverage, and debugging methodologies
• Strong analytical, problem-solving, and communication skills.

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