Senior Engineer, PCBA DFM

About the job

As a Senior Design for Manufacturability (DfM)/Surface Mount Technology (SMT) Engineer, you will serve as the principal technical authority for Printed Circuit Board Assembly (PCBA) DfM across Google’s entire consumer hardware portfolio including Phones, Watches, Hearables, and more. In this role, you will bridge the gap between product design and mass production. You will own the technical roadmap for SMT process integration, qualify next-generation component technologies, and lead high-stakes failure analysis task forces during product ramps. Operating with high technical autonomy, you will influence product design teams early in the development lifecycle and partner directly with global tier-one contract manufacturers to ensure our hardware is built reliably and efficiently at a massive scale.

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• 8 years of experience in high-density consumer hardware design, Printed Circuit Board Assembly (PCBA), and Design for Manufacturability (DFM).
• Experience in Surface Mount Technology (SMT) process integration, high-risk CAD layout reviews, and conducting component-level failure analysis.

Preferred qualifications:

• Master's degree or PhD in Materials Science, Mechanical Engineering, or a related technical field.
• Advanced understanding of solder metallurgy, intermetallic compound formation, SAC305/405 properties, and low-temperature solders.
• Demonstrated industry leadership through patents, published technical papers, or active contributions to industry standards bodies.

Responsibilities

• Define and execute Google's long-term technology roadmaps for PCBA assembly, including qualifying advanced, high-density component packaging for future product generations.
• Author, standardize, and maintain Google’s proprietary PCBA Design Guidelines for rigid and rigid-flex assemblies, setting the benchmark for hardware manufacturability.
• Lead the technical gatekeeping and execution of the OK2FAB layout approval workflow, conducting critical, high-risk CAD layout reviews to mitigate manufacturing risks before fabrication.
• Serve as the engineer, who is directly responsible for high-stakes SMT defect investigations, applying analytical lab techniques to resolve complex assembly failures and recover factory yields during NPI and mass-production ramps.
• Define engineering standards for panel array designs, panelization routing clearances, allowable x-out thresholds, and SMT process traceability parameters.