Ethernet IP Design Application Engineer
- FPGA
- Ethernet/IP
- Verilog
- C++
- Python
- Perl
Job Details:
Job Description:
Job Overview
Altera is focused on delivering high-quality, timely, and differentiated FPGA solutions to customers. To support this mission, we are seeking an experiencedEthernet IP Design Application Engineer with strong expertise in the Networking/Ethernet domain.
In this role, with Ethernet Centre of Excellence, you will serve as a key technical expert, providing proactive and reactive support to customers and internal stakeholders. You will play a critical role in enabling customer success by helping transition designs fromprototype to production, resolving complex technical challenges, and influencing product quality and usability.
We valuetechnical excellence, customer focus, integrity, and collaboration.
Key Responsibilities
- Leaddesign bring-up and validation for Ethernet IPs across speeds: TSE, Multirate PHY IP,10G, 25G, 40G, 50G, and 100G, including features such asAuto-Negotiation/Link Training (AN/LT) andIEEE 1588 Precision Time Protocol (PTP)
- Act as theprimary technical interface for customers, supporting debugging, issue resolution, and performance optimization
- Highlight Ethernet IP use models and demonstrates performance metrics
- Create high-qualitytechnical collateral, including:
- User guides
- Reference designs
- Technology demonstrations and validation tools
- Collaborate closely withcross-functional teams (Design, Validation, Product Engineering, and Sales) to:
- Reproduce and debug customer issues
- Drive resolution and root-cause analysis
- Validate protocol compliance and performance
Provide actionable feedback to improve IP quality and customer experience
Qualifications:
Minimum Qualifications
- 5 to 7 years’ experience with Bachelor’s degree or Master’s degree inElectrical Engineering, Computer Engineering, Computer Science, or a related field
- Hands-on programming experience in one or more of the following:Â VHDL, Verilog, C/C++, Python, Perl, or TCL
Preferred Qualifications
- Experience withFPGA-based design and development
- Strong foundation inDigital Logic Design and Circuit Design
- Exposure toNetworking/Ethernet protocols and architectures
- Understanding ofcustomer-facing roles, including basic business, sales, or marketing principles
Education
- Bachelor’s degree with7+ years, or
- Master’s degree with5+ years
Job Type:
RegularShift:
Shift 1 (India)Primary Location:
Bengaluru, Karnataka, IndiaAdditional Locations:
Regus, MadhapurPosting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Ethernet IP Design Application Engineer · Altera