Silicon Architect

About the job

The US base salary range for this full-time position is $159,900 - $198,000+ 15% bonus target + equity + benefits determined by role, level, and location. Individual pay is determined by additional factors, including job-related skills, experience, and relevant education or training. Learn more aboutbenefits at Google.

The Platforms and Devices team encompasses Google's various computing software platforms across environments (desktop, mobile, applications), as well as our first party devices and services that combine the best of Google AI, software, and hardware. Teams across this area research, design, and develop new technologies to make our user's interaction with computing faster and more seamless, building innovative experiences for our users around the world.

Minimum qualifications:

• Master’s degree in Electrical Engineering, Computer Engineering, Computer Science or a related field, and 2 years of experience in the job offered or in a Silicon Architect-related occupation.
• Alternatively, will accept a PhD degree in Electrical Engineering, Computer Engineering, Computer Science or a related field.
• Position requires: High-performance microprocessor microarchitecture development; Performance modeling or correlation analysis for microprocessors; Cache memory hierarchy concepts or TLB management; C or C++ programming for engineering applications; and Scripting languages for automation.

Responsibilities

• Build modeling infrastructure and develop performance models to execute workload analysis and define high-performance, low-power CPU microarchitectures.
• Architect chip subsystems by analyzing data, writing specifications, and negotiating with stakeholders to ensure sound design trade-offs.
• Conduct performance correlation between models and RTL implementation including micro-benchmark development and performance bug triage.
• Collaborate with cross-functional teams and external partners to debug complex failures and parametrically characterize silicon results. Develop complex end-user scenarios to project and measure the behavior and competitiveness of industry benchmarks. 
• Design solutions for electronic design automation tool flows including code creation, testing, and review for efficiency.