LI
Mixed Signal Verification Engineer
Leadstack Inc
Location not stated
1 month ago
- Verilog
- SystemVerilog
1 month ago
Not enough detail in this posting to match
Job Title:Mixed Signal Verification Engineer
Duration:6+ Months
Location:San Jose, CA (Onsite)
PayRate: $125/hr - $1555/hr on w2
598972
Job Description:
Description
- Creating AMS/DMS testbench for wireless RF and High Speed PHY.
- Working with RF/Analog design engineers for analog circuit models
- Support silicon bring-up and commercialization.
Requirements
- BS or BE minimum, 3+ year experiences
- Deep understanding of digital VLSI simulation flow
- Deep understanding of mixed-mode and analog simulation flow
- Experience with Verilog/SystemVerilog and RNM modeling
- Experience with digital verification, UVM, and waveform debug
- Teamwork, dedication, strong communications and interpersonal skills
- Excellent communication skills both written and verbal P
Preferred Skills
- Deep understanding of wireless RF transceiver and Serdes PHY technology
To know more about current opportunities at LeadStack, please visit us at https://leadstackinc.com/careers/
Should you have any questions, feel free to call me on or send an email on _____________________
Mixed Signal Verification Engineer · Leadstack Inc