AL
Mixed Signal Verification Engineer
Artech LLC
🇺🇸 United States
On-site
1 month ago
$85 – $105 / hour
- Verilog
- SystemVerilog
1 month ago
Not enough detail in this posting to match
Work Location:San Jose, CA
Duration of Assignment:6+ Months
Pay Rate Range: $85.00-$105.00/hr on W2
Description:
JOB RESPONSIBILITIES
• Creating AMS/DMS testbench for wireless RF and High Speed PHY.
• Working with RF/Analog design engineers for analog circuit models
• Support silicon bring-up and commercialization.
Requirements
REQUIRED SKILLS
• BS or BE minimum, 3+ year experiences
• Deep understanding of digital VLSI simulation flow
• Deep understanding of mixed-mode and analog simulation flow
• Experience with Verilog/SystemVerilog and RNM modeling
• Experience with digital verification, UVM, and waveform debug
• Teamwork, dedication, strong communications and interpersonal skills
• Excellent communication skills both written and verbal
PREFERED SKILLS
• Deep understanding of wireless RF transceiver and Serdes PHY technology
Mixed Signal Verification Engineer · Artech LLC