RC
Low Power Design Verification Engineer
RAPS Consulting - India
🇮🇳 India
On-site
11 months ago
- Verilog
- Python
- Perl
11 months ago
- Around 1 to 7 years of hands on verification experience
- Strong background on functional verification fundamentals
- Experience working on System Verilog/UVM based environments
- Strong knowledge of simulator tools such as Xcelium/VCS/Questa sim
- Excellent communication, debugging and problem solving skills
- Good scripting skills (TCL/Python/Perl) for automation
- Expertise in Low Power UPF, SDC formats is a plus
Low Power Design Verification Engineer · RAPS Consulting - India