Linux Kernel Engineer, Tesla SI, Seoul, Korea

What to Expect

As a Linux Kernel Engineer within the Tesla AI Linux Systems team, you will be a key contributor to the system software that powers one of the most advanced and widely deployed AI solutions. You will collaborate closely with both AI silicon and AI software teams, to develop and deploy operating system features that enable a wide range of Tesla AI products, including vehicle autonomy, humanoid robotics, and next-gen inference platforms. Your work will influence both current and future generations of AI silicon and platforms. 

What You’ll Do

• Pre/Post-silicon Linux bring up to mass production of the next generation AI SOC 
• Develop and maintain Linux device drivers for AI inference hardware accelerators, camera capture, Ethernet, UFS, and PCIE 
• Port and maintain RT Linux Kernel for the custom AI system-on-chip 
• Define and develop the hardware - software interactions for our next generation AI silicon and platforms 
• Develop features, system software tools in enhancing the functionality, performance and power of the AI platforms 
• Write well-structured, testable, efficient, and maintainable code 
• Integrate software components into a fully functional software system 

What You’ll Bring

• Engineering Degree in a relevant field, or equivalent experience 
• Strong c-programming skills and Linux Kernel/RTOS experience preferred 
• 3+ years of experience developing Linux device drivers for devices like CSI, Ethernet, PCIE or flash devices like UFS, eMMC, NVMe 
• Experience with board or SoC bring-up for ARM64, RISC-V, or x86 based platforms 
• Good software practices such as code review, clean coding style and documentation 
• Excellent problem solving, critical thinking and communication skills 
• Experience with performance analysis and tracing tools such as perf/ftrace 
• Experience with JTAG in any aspect of bring-up, profiling, or debugging 
• Experience with pre-silicon emulation/simulation environments 
• Experience with V4L2, Realtime-Linux is desirable 
• Experience with scale-up and/or scale-out interconnects, like PCIE or RoCE is desirable