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RC

Lead Verification Engineer -Applied ML

RAPS Consulting - India
🇮🇳 India
On-site
Staff / Principal
6 months ago
  • Verilog
  • Python
  • RAG
6 months ago
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  • Bachelor's or master's degree in electrical engineering, Computer Engineering, or related field.
  • Proven expertise of more than 3-6 years in at least one of the pre-silicon ASIC verification methodologies such as Formal, SV/UVM and/or OVM.
  • Advanced skills in debugging pre-silicon verification failures using waveform viewers and simulation analysis tools.
  • Hands-on experience with industry standard EDA tools (e.g., Jasper, Xcelium, IMC).
  • Strong programming skills in Verilog, System Verilog and Python
  • Excellent communication skills and the ability to thrive in a team-oriented environment.
  • Self-motivated, with a proactive approach to problem solving, continuous learning, and innovation.
Exposure to LLMs and ML technologies like RAG, RFT, RL, and Agentic frameworks

Lead Verification Engineer -Applied ML · RAPS Consulting - India

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