IW
Hardware Validation Engineer & PCB Layout Engineer - Menlo Park CA (Onsite)
Info Way Solutions LLC
Location not stated
On-site
1 month ago
- I2C
- SPI
- UART
- Python
- CAD
- PCIe
- FPGA
1 month ago
Kindly find the 02 roles to work on -
Manager Name – Ankit Chaturvedi
Manager Email -ankit_ch@hcltech.com
Manager Note .
Hello Nirmal,
Request you to please suggest if you have any resource available for deployment for below roles.
Role: Hardware Validation Engineer
Location: Fremont CA or Austin TX (Onsite)
Experience 5 to 15 years only (No senior candidates please)
Buy rate : $70/hr for Austin
$80/hr. for California
Client: Meta
Job Description:
Need a Validation engineer to support the customer Validation boards Pre and post silicon bring up, Testing the voltage regulator circuits, low speed interfaces like I2C, SPI, UART etc...
Board Bring up at silicon level, Power Validation,
Core Competencies
- Good Experience in Hardware Board Bring up and Debug
- 5-10 years of experience working in Hardware boards bring up, pre-silicon validation, PDVT,EDVT
- Experience in Power validation at Board level and silicon level
- Basic knowledge on Python automation would be desirable
- Excellent communication skills and ability to lead the team for quality customer deliverables
| Technical / Soft Skills | Expertise Level (Expert / Good / Knowledge) | Remarks |
| Board Bring up and Debug | Expert | |
| Power Validation | Expert | |
| I/O validation | Good |
Role: PCB Layout Engineer
Location: Menlo Park CA (Onsite)
Buy rate : $80 to $90/hr.
Client: Meta
Job Description:
Must have :Allegro PCB and CAD Software
Key Responsibilities
- Own end-to-end PCB layout for complex, high-density designs used in data center server boards
- Perform high-speed digital layout for interfaces like HBM,DDR4/5, PCIe Gen 5/6, USB 3.2 or higher, with attention to controlled impedance, length matching, and crosstalk mitigation
- Develop and enforce layout design rules for High-speed digital, analog, mixed-signal, and power domains within tightly constrained wearable form factors
- Collaborate with electrical engineers to review schematics and provide layout-driven feedback on component placement, power distribution network design, and signal routing strategies
- Partner with mechanical engineers to resolve physical constraints including board outline, connector placement, thermal management, and stack-up definition
- Drive design-for-manufacturability reviews with contract manufacturers and PCB fabricators to ensure layouts meet yield and reliability targets
- Maintain and improve PCB design standards, layer stack-up libraries, and footprint libraries to support scalable development across multiple hardware programs
- Support by providing layout documentation, net tracing support, and design revision analysis for prototype and production boards
Skill Requirements
1.Advanced Proficiency In Allegro Pcb For Pcb Layout And Design.
Strong Knowledge Of Cad Software For 2D And 3D Design Applications.
10-14 years of CAD experience, Cadence Allegro Layout tool 23.1 and above experience is mandatory
2.Hands on experience in HDI micro via( Blind/Buried) technology
3.Client or high complex SoC/Microprocessor/FPGA based PCB design experience preferred
high complex SoC/Microprocessor/FPGA based PCB design experience preferred
4.Ability to deliver PCB CAD layout of High-Density, High-Speed memory designs (DDR5/LPDDR5), PCIe Gen 5 or Gen 6, Power Delivery, Mixed Analog/Digital
5.Deep knowledge of CES (Constraint Editor) and high -speed constraint driven designs, DFA/DFM/DFT knowledge to adhere to Quality PCB fabrication and assembly assurance
6.Strong Communication and Presentation Abilities To Effectively Convey Design Concepts.
Hardware Validation Engineer & PCB Layout Engineer - Menlo Park CA (Onsite) · Info Way Solutions LLC