AL
Hardware Design and Failure Analysis Engineer
Artech LLC
- πΊπΈ United States
- On-site
- 11 hours ago
- $62 β $65 / hour
- PCIe
- AWS
- Python
11 hours ago
Location: San Jose, CA (Onsite_
Duration: 6 Months
Salary Range: $63.00 - $65.00/Hour on W2 (Without Benefits).
Applicants must be willing to work on W2
Education & Experience:
- B.S. or M.S. in Electrical Engineering, Computer Engineering, Materials Science, or related field with 10+ years of progressive experience in hardware engineering, board design, or system-level failure analysis.
- Well versed in modern system architectures (PCIe Gen4/5/6, DDR4/5, HBM, 56G/112G/224G SerDes, optical transceivers).
- Proven ability to debug complex power distribution network issues/multi-phase VRM transient droop, PMBus/SVID telemetry, switching noise) and high-speed signal integrity anomalies.
- Hands-on experience directing external silicon suppliers and analytical Laboratories through component-level physical FA.
- Strong executive presence with proven capability to articulate complex technical findings to cross-functional leaders and enterprise customers.
- Experience leading hardware quality or reliability taskforces for hyperscale cloud service providers (e.g., Client, Meta, Google, AWS).
- Knowledge of advanced packaging technologies (chiplets, 2.5D/3D ICs, CoWoS) and silicon failure mechanisms.
- Proficiency in writing custom Python or C automation tools to recreate corner-case/intermittent hardware race conditions.
- EIS: ASIC Circuit Design - Analog and Mixed Signal IC Circuit Design
- EIS: Thermal Analysis
- EIS: Embedded Digital Hardware Design and Development
- 6β8 years
- 7+ years in Embedded Digital Hardware Design and Development
Hardware Design and Failure Analysis Engineer Β· Artech LLC