Associate III - VLSI

The 4-person team collectively should demonstrate:

• Create Subsystem Verification plan for PMBUS, AVS interface and sign off protocol compliance
• Formal verification coverage of critical control interfaces
• UVM based Verification environment
• SOC Integration verification and system level scenarios development
• GLS Verification including root causing down to flop level
• Code Coverage, functional coverage
• Fault Injection Campaign Execution for ASIL-D Products

Mandatory:

• Demonstration of AI-driven productivity improvements in Verification test case generation and coverage closure
• Should have thrived in fast paced environments ( startup like) in the recent past
• In Depth debug and Root cause analysis skills