Associate III - Semiconductor Product Validation
- Windows OS
- CMOS
- SQL
- JMP
Role Proficiency:
Conducts root cause analysis and bug advocacy in Semiconductor Products; tracking activities to closure with very minimal supervision
Outcomes:
- Â Â Â Â Conducts validation and root cause analysis
- Â Â Â Â Perform escape analysis
- Â Â Â Â Isolate/ packetize the failures to correct components
- Â Â Â Â Attend customer meeting and communicate effectively on the requirements and results.
- Â Â Â Â Locate the product failures and report it in test repository and bug tracker
- Â Â Â Â Learn technology business domain system domain individually and as recommended by the project/account
- Â Â Â Â Complete the certifications for the role (like ISTQB UST GAMMA certifications)
- Execute test cases across the functionalities
Measures of Outcomes:
- Â Â Â Â Number of showstoppers and critical bugs found
- Â Â Â Â Adherence to schedule / timelines
- Â Â Â Â Number of defects post delivery
- Â Â Â Â Number of non-compliance issues
- Â Â Â Â Reduction of reoccurrence of known defects by SLA
- Â Â Â Â SLA in turnaround of production bugs
- Â Â Â Â Defined productivity standards for project
- Completion of all mandatory training requirements
Outputs Expected:
Manage Project:
- Perform task deliverables with quality and targeting completion timeframe.
Estimate:
- Estimate time
effort
and resource dependence for one's own work and for others' work.
Document:
- Create documentation for own work
- Create test reporting templates
BKMs and knowledge sharing documents for team
Status Reporting:
- Report status of tasks assigned
- Compliance with validation standards and process
Mentoring:
- Host classroom training sessions for the junior validation engineers
- Set FAST goals and provide feedback to FAST goals of mentees
Skill Examples:
- Â Â Â Â Should possess good bug advocacy skills
- Â Â Â Â Should have good report consolidation and presentation skills as well as diplomacy
- Â Â Â Â Should have automation scripting skills
- Â Â Â Â Should be able to do severity and priority identification of sightings raised
- Â Â Â Â Working with Windows OS flavours and installation
- Â Â Â Â Working with BIOS drivers and various display protocols
- Â Â Â Â Ability to estimate effort time required for own work and for the junior engineers
- Â Â Â Â Ability to perform and evaluate test in the customer or target environment
- Â Â Â Â Work in a team environment
- Â Good written and verbal communication abilities
- Â Possess good analytical skills
Knowledge Examples:
- Â Â Â Â Excellent domain and product knowledge
- Â Â Â Â Good knowledge of CPU/ GPU architecture
- Â Â Â Â Awareness of Benchmarking tools and their functionalities
- Â Â Â Â Possesses very good knowledge of products
Additional Comments:1 ATE Test Engineer • Plan and execute pattern validation plans based on schedule • Plan and execute on charz plans based on schedule • Support HTOL and Pkg qualification activities based on schedule • Provide DIB boards design guidelines based on schedule • Work with AMD Pkg and HWI team for HW readiness based on schedule • Work with AMD design team for content readiness based on schedule • ATE test program development, validation and release • Plan and execute sample deliveries plan based on schedule • Plan and execute yield attainment plans based on schedule • Plan and execute test time attainment plans based on schedule • Align testpoints and define Vid bucketing based on schedule • Work with Quality to support RMA debug to meet cycle time with the customers and drive quality improvements to meet targeted DPPM • Qualifying OSAT for manufacturing testing • Manufacturing, and post-manufacturing product life cycle support 3.2 Product Engineering • Familiarity with Semiconductor (CMOS) Testing • Familiarity with Personal Computer Systems (basic Motherboard configuration, Windows OS, baste BIOS settings) • Familiarity with ATE (Advantest 93k) operation, debug and data collection features. • Data Analysis know-how, baste ability with statistical tools (e.g. SQL, JMP, etc.) • Familiarity with DFT concepts (ATPG, BIST, etc) • Have experience on yield engineering and driving yield margin • Work with AMD system teams to align on Vid allocation methodology and ensure product bounding box is met
Associate III - Semiconductor Product Validation · UST