AI
ASIC Verification Engineer: 26-02766
Akraya, Inc.
🇺🇸 United States
On-site
Mid level
1 week ago
- Verilog
- Cisco
- SystemVerilog
- Python
- Perl
- PCIe
- calibration
- AI
- CAD
1 week ago
Contract Type:Â W2 Only
Duration:Â 12 Months
Location:Â Allentown, PA (100% Onsite) or Carlsbad, CA (100% onsite)
Pay Range: $70-$72/hr on W2Â
Job Summary:
We are seeking an experiencedASIC Verification Engineer with5–12 years of experience to support next-generation SoC designs for Cisco's Silicon One team. The ideal candidate will have strong hands-on experience withSystemVerilog, UVM-based verification, testbench development, and block-to-system-level verification.
Key Responsibilities:
- Develop and maintainUVM-based verification environments and testbenches for ASIC/SoC designs.
- Create verification plans and developassertions, agents, traffic generators, scoreboards, and test cases.
- PerformSystemVerilog coding, simulation, debug, and failure analysis.
- Collaborate with design and cross-functional teams to improve design testability and verification coverage.
- Lead complex verification/debug efforts and supporttiming, gate-level, and post-silicon bring-up activities.
- 5–12 years of ASIC/SoC verification experience with strong hands-onSystemVerilog and UVM expertise.
- Proven experience developingUVM testbenches, verification plans, and verification infrastructure from block to system level.
- Experience withtiming/gate-level simulation, complex debug, and C programming for firmware/post-silicon bring-up.
- Bachelor's/Master's degree inElectrical Engineering, Computer Engineering, Communications Engineering, or related field.
- Formal verification and automation usingPython or Perl.
- High-speed protocols such asPCIe, UCIe, etc.
- Analog debug, DAC/client calibration, and white-box verification.
- Experience with AI-based CAD/verification efficiency initiatives.
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ASIC Verification Engineer: 26-02766 · Akraya, Inc.