ASIC Engineer, Design (University Grad)

Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video transcoding and network acceleration.

Responsibilities

• Architecture exploration
• Micro-architecture development
• Soft and hard IP identification, selection and integration. Collaboration with verification and emulation teams in test plan development and debug
• Collaboration with implementation team to close the design on timing and power

Minimum qualifications

• Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta
• Currently has, or is in the process of obtaining a PhD degree in computer science, computer engineering, a relevant technical field, and/or equivalent practical experience
• Experience in micro-architecture and RTL development for complex control and data path IPs or experience in SoC micro-architecture, design and integration
• RTL development using Verilog, SystemVerilog and HLS Experience in data path development
• Experience in CPU, NOC, Memory and Peripheral Subsystems
• Experience with Synthesis, Timing Closure and Formal Verification Methodology

Preferred qualifications

• Experience in data path development
• Experience in CPU, NOC, Memory and Peripheral Subsystems
• Experience with Synthesis, Timing Closure and Formal Verification Methodology