Analog IC Layout Engineer

NXP USA Inc.

🇲🇽 Mexico

1 week ago

Linux
CMOS
Python

1 week ago

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About the TeamNXP Semiconductors is seeking an Analog IC Layout Engineer to join the Central Layout Group serving the Power & Energy Business Line, with a primary focus on Automotive Power Solutions (APS).The Central Layout Group delivers physical implementation expertise for complex mixed-signal and power management integrated circuits supporting multiple product lines worldwide. The team collaborates with Design, Verification, Package, Test and Product Engineering organizations across a global R&D network to develop next-generation automotive and industrial semiconductor solutions.Role SummaryThe successful candidate will contribute to the development of analog and mixed-signal integrated circuits, supporting physical implementation activities from block-level development through product integration. The role offers the opportunity to work within an international and multidisciplinary engineering environment.Key ResponsibilitiesLayout Development• Develop Analog and Mixed-Signal layout blocks from schematic to tape-out
• Support floorplanning and physical implementation activities
• Optimize layouts for performance, matching, reliability and manufacturability
• Contribute to top-level integration activitiesVerification and Quality• Execute DRC, LVS, ERC and physical verification activities
• Support parasitic extraction and post-layout analysis
• Participate in design reviews and sign-off activities
• Ensure high-quality layout deliveries following NXP methodologiesCross-Functional Collaboration• Collaborate closely with Analog Design, Verification, Package, Test and Product Engineering teams
• Support troubleshooting and problem-solving activities during product development
• Contribute to continuous improvement of layout methodologies and best practicesRequired Skills• Bachelor or Master Degree in Electrical Engineering, Electronics, Physics or Microelectronics
• Knowledge of Analog IC Layout methodologies
• Experience with Cadence Virtuoso Layout environment
• Understanding of DRC/LVS verification concepts
• Familiarity with Linux working environments
• Strong analytical and problem-solving skills
• Ability to collaborate effectively in multicultural and international teams
• Fluent written and spoken EnglishPreferred Qualifications• Experience with Calibre, PVS or equivalent verification tools
• Knowledge of CMOS, BCD or High Voltage technologies
• Knowledge of Analog Mixed-Signal integrated circuits
• Basic scripting skills (SKILL, Python, TCL or Shell)
• Experience in automotive semiconductor development
• Interest in layout automation and methodology improvements

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Analog IC Layout Engineer · NXP USA Inc.

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